The CD4042BD is a quad CMOS clocked D-type Latch IC contains four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all outputs are electrically identical. Information present at the data input is transferred to outputs Q and Q during the clock level which is programmed by the polarity input. For polarity = 0 the transfer occurs during the 0 clock level and for polarity = 1 the transfer occurs during the 1 clock level. The outputs follow the data input providing the clock and polarity levels defined above are present. When a clock transition occurs (positive for polarity = 0 and negative for polarity = 1) the information present at the input during the clock transition is retained at the output until an opposite clock transition occurs.
• Clock polarity control
• Q and Q Outputs
• Common Clock
• low power TTL compatible
• Standardized, symmetrical output characteristics
• 100% Tested for quiescent current at 20V
• Green product and no Sb/Br
Полупроводники — МикросхемыЛогикаТриггеры-защелки
Технические параметры
| Выходной Ток | 6.8мА |
| Минимальная Рабочая Температура | -55 C |
| Максимальная Рабочая Температура | 125 C |
| Максимальное Напряжение Питания | 18В |
| Минимальное Напряжение Питания | 3В |
| Количество Выводов | 16вывод(-ов) |
| Тип Выхода Микросхемы | Дифференциальный |
| Количество Бит | 4бит |
| Задержка Распространения | 40нс |
| Стиль Корпуса Микросхемы Логики | SOIC |
| Тип Защелки | D Типа |
| Базовый Номер / Семейство Логики | CD4042 |
| Базовый Номер Микросхемы Логики | 4042 |
| Семейство Логической Микросхемы | CD4000 |
| Вес, г | 0.638 |

