The SN74HCT573DBR is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the latch-enable input is high, the Q outputs respond to the data inputs. When LE is low, the outputs are latched to retain the data that was set up at the D inputs. A buffered OE input can be used to place the eight outputs in either a normal logic state or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches.
• High-current 3-state outputs drive bus lines directly or up to 15 LSTTL loads
• 80µA Maximum low power consumption
• 21ns Typical tpd
• ±6mA Output drive at 5V
• 1µA Maximum low input current
• Inputs are TTL-voltage compatible
• Bus-structured pinout
• Green product and no Sb/Br
Полупроводники — МикросхемыЛогикаТриггеры-защелки
Технические параметры
| Выходной Ток | 6мА |
| Минимальная Рабочая Температура | -40 C |
| Максимальная Рабочая Температура | 85 C |
| Максимальное Напряжение Питания | 5.5В |
| Минимальное Напряжение Питания | 4.5В |
| Количество Выводов | 20вывод(-ов) |
| Тип Выхода Микросхемы | С Тремя Состояниями |
| Количество Бит | 8бит |
| Задержка Распространения | 59нс |
| Стиль Корпуса Микросхемы Логики | SSOP |
| Тип Защелки | Прозрачная D Типа |
| Базовый Номер / Семейство Логики | 74HCT573 |
| Базовый Номер Микросхемы Логики | 74573 |
| Семейство Логической Микросхемы | 74HCT |
| Вес, г | 0.225 |



