74HCT166D, Регистр сдвига, семейство HCT, 74HCT166, Параллельный в Последовательный, 1 Элемент, 8 бит, SOIC

The 74HCT166D is a 8-bit parallel-in/serial out Shift Register features a serial data input (DS), eight parallel data inputs (D0 to D7) and a serial output (Q7). When the parallel enable input (PE) is low, the data from D0 to D7 is loaded into the shift register on the next low-to-high transition of the clock input (CP). When PE is high, data enters the register serially at DS with each low-to-high transition of CP. When the clock enable input (CE) is low data is shifted on the low-to-high transitions of CP. A high on CE disables the CP input. Inputs include clamp diodes which enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

• Synchronous parallel-to-serial applications
• Synchronous serial input for easy expansion
• TTL Input level
• Complies with JEDEC standard No. 7A

Полупроводники — МикросхемыЛогикаСдвигающие Регистры

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