SN74LS193N, Двоичный синхронный суммирующий/вычитающий счетчик, семейство LS, 32МГц, 4.75В — 5.25В, DIP-16

The SN74LS193N is a synchronous 4-bit up/down Binary Counter with dual clock and clear. This monolithic circuit is synchronous reversible counter having a complexity of 55 equivalent gates. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidently with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes which are normally associated with asynchronous counter. The outputs of the four master-slave flip-flops are triggered by a low-to-high-level transition of either count input. The direction of counting is determined by which count input is pulsed while the other count input is high. A clear input has been provided which forces all outputs to the low level when a high level is applied. The clear function is independent of the count and load inputs. The clear, count and load inputs are buffered to lower the drive requirements.

• Cascading circuitry provided internally
• Individual preset to each flip-flop
• Fully independent clear input
• Pb-free product

Полупроводники — МикросхемыЛогикаСчетчики

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