The TPIC6259DWG4 is a 8-bit addressable latch controls open-drain DMOS transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers and decoders or demultiplexers. This is a multi-functional device capable of storing single-line data in eight addressable latches with 3-to-8 decoding or demultiplexing mode active-low DMOS outputs. Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS transistor output inverts the data input with all unaddressed DMOS-transistor outputs remaining in their previous states. In the memory mode, all DMOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs.
• Eight power DMOS transistor outputs of 250mA continuous current
• Output clamp voltage at 45V
• Four distinct function modes
• Low power consumption
• 75mJ Avalanche energy
• 1.5A Pulsed current per output
• Green product and no Sb/Br
Полупроводники — МикросхемыЛогикаТриггеры-защелки
Технические параметры
| Минимальная Рабочая Температура | -40 C |
| Максимальная Рабочая Температура | 125 C |
| Максимальное Напряжение Питания | 5.5В |
| Минимальное Напряжение Питания | 4.5В |
| Количество Выводов | 20вывод(-ов) |
| Тип Выхода Микросхемы | Открытый Сток |
| Количество Бит | 8бит |
| Задержка Распространения | 625нс |
| Стиль Корпуса Микросхемы Логики | SOIC |
| Тип Защелки | Адресуемая |
| Семейство Логической Микросхемы | TPIC |
| Вес, г | 0.566 |



