SN74LS73AN, Триггер, 74LS73, JK, 15 нс, 30 МГц, 8 мА, DIP

The SN74LS73AN is a dual J-K Flip-flop with clear with LS technology and two independent J-K flip-flops with individual J-K, clock and direct clear inputs. The LS73A contains two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q output high.

• TTL input and output

Полупроводники — МикросхемыЛогикаТриггеры

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