The SN74ALVCH162373GR is a 16-bit Transparent D Latch with 3-state outputs. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the LE input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pull-up components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
• Member of the Texas Instruments Widebus™ family
• Bus hold on data inputs eliminates the need for external pull-up/pull-down resistors
• Output ports have equivalent 26R series resistors, so no external resistors are required
• Latch-up performance exceeds 250mA per JESD 17
• Green product and no Sb/Br
Полупроводники — МикросхемыЛогикаТриггеры-защелки
Технические параметры
| Выходной Ток | 12мА |
| Минимальная Рабочая Температура | -40 C |
| Максимальная Рабочая Температура | 85 C |
| Максимальное Напряжение Питания | 3.6В |
| Минимальное Напряжение Питания | 1.65В |
| Количество Выводов | 48вывод(-ов) |
| Тип Выхода Микросхемы | С Тремя Состояниями |
| Количество Бит | 16бит |
| Задержка Распространения | 4нс |
| Стиль Корпуса Микросхемы Логики | TSSOP |
| Тип Защелки | Прозрачная D Типа |
| Базовый Номер / Семейство Логики | 74ALVC16373 |
| Базовый Номер Микросхемы Логики | 7416373 |
| Семейство Логической Микросхемы | 74ALVC |
| Вес, г | 0.416 |


