SN74LVC1G175DBVR, D-тригер с асинхронным сбросом [SOT-23-6]

The SN74LVC1G175DBVR is a D-type Flip-flop is designed for 1.65 to 5.5V VCC operation. It has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s rising edge. When CLR is low, Q is forced into the low state, regardless of the clock edge or data on D. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Supports down translation to VCC
• Ioff Supports live insertion, partial-power-down mode and back-drive protection
• Latch-up performance exceeds 100mA per JESD 78, class II
• 10µA Maximum low power consumption
• ±24mA Output drive at 3.3V
• Green product and no Sb/Br

Технические параметры